Reconfigurable RF integrated circuits are an attractive feature to sustain the increasing number of standards and frequency bands of modern mobile devices. In a reconfigurable RF architecture, the connection between different blocks, e.g., mixers, analog-to-digital converters, filters, and amplifiers, can be changed (namely, inter-block reconfiguration). Conversely, each block can be reconfigured internally (i.e., intra-block reconfiguration), changing the resonance frequency or some other performance parameter of the block. Reconfiguration reduces the need for independent RF chains for each band, enabling block reutilization, eliminating redundant components, adding flexibility, and reducing the area overhead and the complexity of wireless front-ends. This in turn reduces the costs and the development time of a system.
The basic device in any RF reconfigurable system is the high-performance RF switch. Resistive memory devices, such as ReRAM, CBRAM, and PCM, have been recently proposed as high-performance RF switches due to their excellent transmission properties as well as their small footprint, low power consumption, and non-volatility.
My current work is focused on device fabrication and modeling, as well as circuit design of reconfigurable RF front-end circuits such as tunable inductors, SPDTs, tunable filters, and phase-shifters.
